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X9318
Data Sheet September 14, 2005 FN8184.1
Digitally Controlled Potentiometer (XDCPTM)
FEATURES * * * * Solid-state potentiometer 3-wire serial interface Terminal voltage, 0 to +8V 100 wiper tap points --Wiper position stored in nonvolatile memory and recalled on power-up 99 resistive elements --Temperature compensated --End to end resistance range 20% Low power CMOS --VCC = 5V --Active current, 3mA max. --Standby current, 1mA max. High reliability --Endurance, 100,000 data changes per bit --Register data retention, 100 years RTOTAL value = 10k Packages --8 Ld SOIC and DIP Pb-free plus anneal available (RoHS compliant)
DESCRIPTION The Intersil X9318 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer for voltage control or as a two-terminal variable resistor for current control in a wide variety of applications. PIN CONFIGURATION
DIP/SOIC INC U/D RH VSS 1 2 3 4 X9318 8 7 6 5 VCC CS RL RW
*
*
*
* * *
APPLICATIONS * * * * * LCD bias control DC bias adjustment Gain and offset trim Laser diode bias control Voltage regulator output control
BLOCK DIAGRAM
VCC (Supply Voltage) U/D INC CS Up/Down Counter 99 98 97 7-Bit Nonvolatile Memory One 96 of One Hundred Decoder 2 VSS (Ground) General VCC VSS Store and Recall Control Circuitry 1 0 RL RW Detailed RH
Up/Down (U/D) Increment (INC) Device Select (CS) Control and Memory
RH RW
Wiper Switches
Resistor Array
RL
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
X9318 Ordering Information
PART NUMBER X9318WP8 X9318WP8I X9318WS8* X9318WS8Z* (Note) X9318WS8I* X9318WS8IZ* (Note) *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. PART MARKING X9318WP X9318WP I X9318W X9318W Z X9318W I X9318W Z I RTOTAL (k) 10 TEMP RANGE (C) 0 to 70 -40 to 85 0 to 70 0 to 70 -40 to 85 -40 to 85 8 Ld PDIP 8 Ld PDIP 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-free) PACKAGE
PIN DESCRIPTIONS DIP/SOIC
1 2 3 4 5 6 7 8
Symbol
INC U/D RH VSS RW RL CS VCC
Brief Description
Increment. Toggling INC while CS is low moves the wiper either up or down. Up/Down. The U/D input controls the direction of the wiper movement. The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. Ground. The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer. The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. Chip Select. The device is selected when the CS input is LOW, and de-selected when CS is high. Supply Voltage.
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ABSOLUTE MAXIMUM RATINGS Junction Temperature under bias...... -65C to +135C Storage temperature ......................... -65C to +150C Voltage on CS, INC, U/D and VCC with respect to VSS ................................. -1V to +7V RH, RW, RL to ground..........................................+10V Lead temperature (soldering 10s) ..................... 300C IW (10s) ..............................................................6mA COMMENT Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
POTENTIOMETER CHARACTERISTICS (VCC = 5V 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol Parameter
End to end resistance tolerance VRH/RL RW IW RH/RL terminal voltage Power rating Wiper resistance Wiper current(5) Noise(7) Resolution Absolute linearity(1) Relative linearity(2) RTOTAL temperature coefficient(5) Ratiometric temperature coefficient(5),(6) CH/CL/CW(5 Potentiometer capacitances
)
Min.
-20 VSS
Typ.(4)
Max.
+20 8 25
Unit
% V mW mA dBV %
Test Conditions/Notes
See ordering information for values VSS = 0V IW = 1mA See test circuit Ref: 1kHz V(RH) = 8V, V(RL) = 0V
40 -3.0 -120 1 -1 -0.2 300 -20 10/10/25 4.5
200 +3.0
+1 +0.2 +20
MI(3) MI(3) ppm/C ppm/C pF
See equivalent circuit
VCC
Supply Voltage
5.5
V
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D.C. OPERATING CHARACTERISTICS (VCC = 5V 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol
ICC
Parameter
VCC active current (Increment)
Min.
Typ.(4)
1
Max.
3
Unit
mA
Test Conditions
CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V @ min. tCYC RL, RH, RW not connected CS 2.4V, U/D and INC = 0.4V RL, RH, RW not connected VIN = VSS to VCC
ISB ILI VIH VIL CIN(5)
Standby supply current CS, INC, U/D input leakage current CS, INC, U/D input HIGH voltage CS, INC, U/D input LOW voltage CS, INC, U/D input capacitance -10 2 -1
300
1000 +10 VCC + 1 0.8 10
A A V V pF
VCC = 5V, VIN = VSS, TA = 25C, f = 1MHz
ENDURANCE AND DATA RETENTION (VCC = 5V 10%, TA = Full Operating Temperature Range) Parameter
Minimum endurance Data retention
Min.
100,000 100
Unit
Data changes per bit Years
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [V(RW(n)(actual)) - V(RW(n)(expected))]/MI V(RW(n)(expected)) = n(V(RH) - V(RL))/99 + V(RL), with n from 0 to 99. (2) Relative linearity is a measure of the error in step size between taps = [V(RW(n+1)) - (V(RW(n)) - MI)]/MI (3) 1 Ml = Minimum Increment = [V(RH) - V(RL)]/99. (4) Typical values are for TA = 25C and nominal supply voltage. (5) This parameter is not 100% tested. (6) Ratiometric temperature coefficient = (V(RW)T1(n) - V(RW)T2(n))/[V(RW)T1(n)(T1 - T2) x 106], with T1 & T2 being 2 temperatures, and n from 0 to 99. (7) Measured with wiper at tap position 31, RL grounded, using test circuit.
Test Circuit
Equivalent Circuit
RTOTAL RH CH Force Current 10pF RW CW 25pF CL 10pF RL
Test Point
RW
A.C. CONDITIONS OF TEST
Input pulse levels Input rise and fall times Input reference levels 0.8V to 2.0V 10ns 1.4V
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A.C. OPERATING CHARACTERISTICS (VCC = 5V 10%, TA = Full Operating Temperature Range unless otherwise stated) Limits Symbol
tCl tlD
(5) (5)
Parameter
CS to INC setup INC HIGH to U/D change U/D to INC setup INC LOW period INC HIGH period INC inactive to CS inactive CS deselect time (STORE) CS deselect time (NO STORE) INC to RW change INC cycle time INC input rise and fall time Power-up to wiper stable VCC power-up rate
Min.
100 100 1 1 1 1 20 1
Typ.(4)
Max.
Unit
ns ns s s s s ms s
tDI
tlL tlH tlC tCPHS tCPHNS(5
)
tIW tCYC tR, tF(5) tPU(5) tR VCC(5)
100 4
500 500 500
s s s s V/ms
0.2
50
POWER-UP AND DOWN REQUIREMENTS The recommended power-up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after VCC reaches its final value. The VCC ramp spec is always in effect. In order to prevent unwanted tap position changes, or an inadvertant store, bring the CS and INC high before or concurrently with the VCC pin on powerup. A.C. TIMING
CS tCYC tCI INC tID tDI tF tIL tIH tIC tCPHS 90% 90% 10% tR
tCPHNS
U/D tIW RW MI (3)
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PIN DESCRIPTIONS RH and RL The high (RH) and low (RL) terminals of the X9318 are equivalent to the fixed terminals of a mechanical potentiometer. The terminology of RL and RH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. RW Rw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9318 will be placed in the low power standby mode until the device is selected once again. PIN CONFIGURATION
DIP/SOIC INC U/D RH VSS 1 2 3 4 X9318 8 7 6 5 VCC CS RL RW
PIN NAMES Symbol
RH RW RL VSS VCC U/D INC CS
Description
High terminal Wiper terminal Low terminal Ground Supply voltage Up/Down control input Increment control input Chip select control input
PRINCIPLES OF OPERATION There are three sections of the X9318: the control section, the nonvolatile memory, and the resistor array. The control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 99 individual resistors connected in series. Electronic switches at either end of the array and between each resistor provide an electrical connection to the wiper pin, RW. The wiper acts like its mechanical equivalent and does not move beyond the first or last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a "make before break" mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored.
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INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of one hundred wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. The system may select the X9318, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a powerup/down cycle recalled the previously stored data. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. MODE SELECTION CS
L L H H X L L L
INC
U/D
H L X X X H L Wiper up Wiper down
Mode
Store wiper position to nonvolatile memory Standby No store, return to standby Wiper Up (not recommended) Wiper Down (not recommended)
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APPLICATIONS INFORMATION Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Basic Configurations of Electronic Potentiometers
VREF RH RW VREF
RL I
Three terminal potentiometer; variable voltage divider
Two terminal variable resistor; variable current
Basic Circuits
Buffered Reference Voltage R1 +V +5V VREF RW + - LMC7101 VOUT +V VOUT = VW/RW (a) (b) RW RW X 100K +8V 100K VO = (R2/R1)VS - + VO LMC7101 VS Cascading Techniques +V +V R1 R2 Single Supply Inverting Amplifier +8V
Voltage Regulator
Offset Voltage Adjustment
Comparator with Hysteresis
VIN
317 R1
VO (REG)
R1 VS 100k -
R2 VS +12V VO
LT311A
- + VO
Iadj R2 10k 10k VO (REG) = 1.25V (1+R2/R1)+Iadj R2 +12V 10k
+ LMC7101
VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min)
(for additional circuits see AN115)
}
R1
}
R2
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PACKAGING INFORMATION 8-Lead Plastic Small Outline Package, Type S (8-lead SOIC)
0.150 (3.80) 0.228 (5.80) 0.158 (4.00) 0.244 (6.20) Pin 1 Index Pin 1
0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7
0.053 (1.35) 0.069 (1.75) 0.004 (0.19) 0.010 (0.25)
0.050 (1.27)
0.010 (0.25) X 45 0.020 (0.50)
0.050"Typical
0 - 8 0.0075 (0.19) 0.010 (0.25) 0.016 (0.410) 0.037 (0.937) 0.250"
0.050" Typical
FOOTPRINT
0.030" Typical 8 Places
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
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PACKAGING INFORMATION
8-Lead Plastic, DIP, Package Code P8
0.430 (10.92) 0.360 (9.14)
0.260 (6.60) 0.240 (6.10) Pin 1 Index Pin 1 0.300 (7.62) Ref. Half Shoulder Width On All End Pins Optional Seating Plane 0.150 (3.81) 0.125 (3.18) 0.060 (1.52) 0.020 (0.51)
0.145 (3.68) 0.128 (3.25) 0.025 (0.64) 0.015 (0.38) 0.065 (1.65) 0.045 (1.14) 0.020 (0.51) 0.016 (0.41)
0.110 (2.79) 0.090 (2.29)
.073 (1.84) Max.
0.325 (8.25) 0.300 (7.62)
Typ. 0.010 (0.25)
0 15
NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10
FN8184.1 September 14, 2005

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